Parallel iterative solvers using programmable devices

Safaa Kasbah; Issam Damaj

Parallel iterative solvers using programmable devices

^*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceeding › Chapter › peer-review

Abstract

In this paper, we aim at increasing the usage of iterative methods in all possible fields by accelerating such solvers using Reconfigurable Hardware. To demonstrate the acceleration of these solvers, we implement the Jacobi solver on different classes of FPGAs, such as Virtex II Pro, Altera Stratix and Spartan3L. The design presented is implemented using Handel-C, a compiler with hardware output. Obtained results show that reconfigurable hardware is suitable for realizing accelerated versions of such solvers.

Original language	English
Title of host publication	New Developments in Computer Research
Publisher	Nova Science Publishers, Inc.
Pages	81-92
Number of pages	12
ISBN (Print)	9781614703211
Publication status	Published - Aug 2012
Externally published	Yes

Cite this

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Parallel iterative solvers using programmable devices

Abstract

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