FPGA implementation of light rail transit fare card controller using VHDL

In this paper a new and better fare system is introduced. One part of the Light Rail Transit (LRT) system that needs to be upgraded is the fare card controller because smart card (similar to Touch & Go) will replace the existing paper ticket. Altera Quartus II Web Edition software tool is used to synthesis of HDL designs, which enables the developer to compile their designs, perform timing analysis, examine RTL diagrams, simulate a design's reaction to different stimuli, and configure the target device with the programmer. According to the result in simulation and implementation in the FPGA (Field Programmable Gate Array), it can be said that the designed model is working as expected.