TY - GEN
T1 - A unified analysis approach for hardware and software implementations
AU - Damaj, Issam W.
N1 - Publisher Copyright:
© 2016 IEEE.
PY - 2017/3/6
Y1 - 2017/3/6
N2 - Modern computing systems are hybrid in nature and employ various processing technologies that range from specific-To general-purpose processors. In co-design environments, specific-purpose processors, also known as hardware, work to support software implementations under general-purpose systems to create high-performance computers. Algorithms and computationally intensive tasks are partitioned among the different processing subsystems to achieve desirable degrees of parallel processing and performance characteristics. In this paper, a unified statistical performance analysis formulation is presented. The proposed statistical formulation combines the heterogeneous characteristics of both hardware and software implementations to provide grounds for thorough evaluations. The formulation includes the development of performance profiles, key indicators, and the composition of a master indicator based-on heterogeneous measurements. The investigation includes a case-study that targets a set of simple cryptographic algorithms. The two main targeted high performance computing devices are multicore processors for software implementations and high-end Field Programmable Gate Arrays for hardware implementations.
AB - Modern computing systems are hybrid in nature and employ various processing technologies that range from specific-To general-purpose processors. In co-design environments, specific-purpose processors, also known as hardware, work to support software implementations under general-purpose systems to create high-performance computers. Algorithms and computationally intensive tasks are partitioned among the different processing subsystems to achieve desirable degrees of parallel processing and performance characteristics. In this paper, a unified statistical performance analysis formulation is presented. The proposed statistical formulation combines the heterogeneous characteristics of both hardware and software implementations to provide grounds for thorough evaluations. The formulation includes the development of performance profiles, key indicators, and the composition of a master indicator based-on heterogeneous measurements. The investigation includes a case-study that targets a set of simple cryptographic algorithms. The two main targeted high performance computing devices are multicore processors for software implementations and high-end Field Programmable Gate Arrays for hardware implementations.
UR - http://www.scopus.com/inward/record.url?scp=85015851024&partnerID=8YFLogxK
U2 - 10.1109/MWSCAS.2016.7870083
DO - 10.1109/MWSCAS.2016.7870083
M3 - Conference contribution
AN - SCOPUS:85015851024
T3 - Midwest Symposium on Circuits and Systems
BT - 2016 IEEE 59th International Midwest Symposium on Circuits and Systems, MWSCAS 2016
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 59th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2016
Y2 - 16 October 2016 through 19 October 2016
ER -