Reconfigurable hardware in modern security systems

The rapid progress and advancement in electronic chips technology provides a variety of new implementation options for system engineers. The choice varies between the flexible programs running on a general purpose processor (GPP) and the fixed hardware implementation using an application specific integrated circuit (ASIC). Many other implementation options present, for instance, a system with a RISC processor and a DSP core. Other options include graphics processors and microcontrollers. Specialist processors certainly improve performance over general-purpose ones, but this comes as a quid pro quo for flexibility. Combining the flexibility of GPPs and the high performance of ASICs leads to the introduction of reconfigurable computing (RC) as a new implementation option with a balance between versatility and speed. Field Programmable Gate Arrays (FPGAs), nowadays are important components of RCsystems, have shown a dramatic increase in their density over the last few years. For example, companies like Xilinx and Altera have enabled the production of FPGAs with several millions of gates, such as, the Virtex-2 Pro and the Stratix-2 FPGAs. Considerable research efforts have been made to develop a variety of RC-systems. Research prototypes with fine-grain granularity include Splash, DECPeRLe-1, DPGA and Garp. Examples of systems with coarsegrain granularity are RaPiD, MorphoSys, and RAW. Many other systems were also developed, for instance, rDPA, MATRIX, REMARC, DISC, Spyder and PRISM. The focus of this chapter is on introducing the use of reconfigurable computers in modern security applications. The chapter investigates the main reasons behind the adoption of RCsystems in security. Furthermore, a technical survey of various implementations of security algorithms under RC-systems is included laying common grounds for comparisons. In addition, this chapter mainly presents case studies from cryptography implemented under RCsystems.