A new addressing schema for mapping honeycomb into different topologies

Bassam Al-Shargabi*, Abdulaziz Al-Nahari, Alia Taha Sabri

*Awdur cyfatebol y gwaith hwn

Allbwn ymchwil: Cyfraniad at gyfnodolynErthygladolygiad gan gymheiriaid

Crynodeb

In a parallel system, nodes communicate with each other by exchanging messages. Different topologies exist for arranging processors in a network based on the architecture of the network; or based on the fact that a network is a multiprocessor or multi computer network. A honeycomb network is considered as a multiprocessor / multi-computer interconnection network where each node represents a processor/computer and each line represents a link between two computers. In this paper a new addressing schema is presented for the honeycomb network; which can be used in many levels. The rest of the paper defines some methods of mapping the honeycomb into bus, tree, grid in addition to a proposed cluster-based architecture. Mapping the honeycomb requires however some compromising; such as ignoring some links or adding others. Recent patent and research advances aim to find methods for reducing the complexity of mapping honeycomb into other topologies.

Iaith wreiddiolSaesneg
Tudalennau (o-i)211-216
Nifer y tudalennau6
CyfnodolynRecent Patents on Computer Science
Cyfrol4
Rhif cyhoeddi3
Dynodwyr Gwrthrych Digidol (DOIs)
StatwsCyhoeddwyd - 2011
Cyhoeddwyd yn allanolIe

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